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Abstract: L9320 is an adaptive audio pulse coding (ADPCM) codec from LANWAVE. In addition to the normal ADPCM codec mode, the device also has a PCM codec mode, a power test mode, and a codec test mode. In this paper, the working principle and usage method of L9320 codec are analyzed, and the typical application circuit of L9320 in portable speech system is given.Keywords: speech coder; codec; ADPCM; PCM; L9320
L9320 is an adaptive audio pulse coding (ADPCM) codec chip produced by LANWAVE. Its voice compression codec method complies with the International Telephone and Telegraph Advisory Committee (CCITT) G. 721 and G. 726 standard, also compatible with CCITT's G. 714 standard. The L9320 can convert analog speech into digital signals at rates of 32, 24, or 16 kB/s; and can inversely transform digital signals of the same rate to form analog voice signals. The L9320 has a bidirectional signal path for the ADPCM codec and the PCM codec/filter. In addition to the normal ADPCM codec mode, the L9320 also has a PCM codec mode, a power test mode, and a codec test mode. The different rate channels of the L9320 can be used to achieve different multiplication ratios, thereby effectively improving channel utilization.
1 The main function of L9320
1.1 Overview
The L9320 features a pre-configurable serial port (SSP) that interfaces with a 16-byte status setting register. The microcontroller is able to obtain internal data from the SSP interface. In addition, the chip can easily control the analog interface by including an output amplifier with a PCM codec filter. L9320 mainly has the following characteristics:
â— It can work in full duplex in the voltage range of 2.7~5.25V;
â— The main clock frequency is 10.24MHz?
â— Internally integrated 14bits A/D and D/A converters;
◠can complete μ law and A law compression;
â— ADPCM encoding can be performed on 32, 24 and 16kB/s data, and the encoded data can reach 128?2048kbps;
â— With programmable transmit gain, receive attenuation and sidetone gain control functions;
â— Available in 28-pin DIP or SOP package.
1.2 pin function
The pinout of the L9320 is shown in Figure 1.
2 L9320 internal principle
Figure 2 shows the block diagram of the internal functions of the L9320. The device includes four subsystems: ∑-Δ codec filtering, power management, DSP processing, and register status control.
2.1 Power Management
The L9320's power management system consists primarily of a set of 5V power supplies designed for analog signal processing units and a set of 3V power supplies designed to power digital signal processing units. Except for the output power amplifiers AX0 and PO, all analog circuits are powered by this set of 5.5V supplies. It is worth noting that the drive currents of AX0 and PO are provided by the VEXT pin. When VEXT is +5V±5%, VDD should be directly connected to VEXT, and it is not necessary to use charging capacitors C1+ and C1-. However, at this time, BRO?b2? must be set to "1" to turn off the charging current pump circuit. When VEXT is 2.7 to 5.25V, VDD is the output voltage of the current pump circuit, so it cannot be connected to VEXT, but should be coupled to Vss through a 0.1μF capacitor. The all-digital circuit should be powered by 3V through VDSP. No matter how the voltage on VEXT changes, the digital circuit is powered by VDSP, which can reduce the total power consumption of the chip. It should be noted that the VDSP should be coupled to Vss through a 0.1μF capacitor. In addition, the voltage levels of other analog reference voltages, such as RO, AX0, and PO, can be determined by BR0?b2?, typically 2.5V or VEXT/2.
2.2 ∑-Δ codec filtering
Usually in a PCM communication system, before a speech signal enters a PCM encoder, a 300 to 3400 Hz filter must be passed to filter out high frequency components in the speech, thereby preventing aliasing that may occur during sampling. The device is also called a pre-aliasing filter. Since the output signal of the PCM decoder is a staircase waveform, a low-pass filter of 300 to 3400 Hz with an x/sinx compensation factor must be used to recover the original speech signal. However, miniaturization of audio analog filters has always been a problem. In this frequency band, design using LC filters is the most undesirable, while RC active filters can reduce the circuit size, but in sensitivity and stability. And the accuracy is not satisfactory. Therefore, the L9320 integrated switch-capacitor filter should be used as much as possible, and its accuracy and temperature stability are very high.
The L9320 has its own linear 14-bit PCM codec filter with ∑-Δ technology. L9320 can be divided into transmitting channel and receiving channel. For the transmit channel, when the analog signal from the microphone is sent to the power amplifier, its amplification gain can be controlled by software through the gain control module, ranging from 0 to 7 dB with a step size of 1 dB. The ∑-Δ modulation function module oversamples the input analog signal at a frequency of 1.024 MHz, and the anti-aliasing filter of the next stage can reduce the sampling frequency to 32 kHz, and then extract it 4 times to obtain 8 kHz. After various filtering processes, the 14-bit data after A/D can be sent to the DSP processing module for further processing. For the receive channel, the 14-bit linear digital signal from the Rx attenuation control portion of the DSP processing block is first sent to the digital anti-aliasing interpolation filter to perform the opposite function of the transmit channel, and the sample rate is also increased from 8 kHz (14 bits) to At 1.024MHz (14bits), the ∑-Δ demodulation function converts 14-bit samples (1.024MHz) into 1-bit samples (1.024MHz). The output digital signal is sent to the switched capacitor low-pass filter, and then the smoothing filter is used to eliminate other spectral components caused by the capacitive filter, and the original speech signal is recovered. Finally, the output analog signal is sent to the power amplifier RO output.
It should be noted that another power amplifier PO in the L9320 adopts a push-pull structure. AX0 and PO have different configurations in different application circuits. AX0 is mainly used in the portable field, and PO is mainly used in the high gain range. The gain range can be adjusted by two external resistors.
2.3 DSP processing module
The DSP processing module is the core part of the L9320 and can also be divided into a transmit channel and a receive channel. The transmit channel mainly performs sidetone gain processing, μ/A-law compression, and ADPCM encoding and tone encoding. In the side gain section, the input samples are fed back to the receive channel and added to the digital receive gain output, and the results after A/D are stored in the BR9?b7?b0? and BR10?b7?b2? registers. Whether ADPCM encoding/tone encoding provides 16 kbps? 24 kbps, 32 kbps ADPCM data, or 64 kbps PCM data should be determined according to the frame format transmitted. The frame length represents the number of upper falling edges of BCLK when the frame synchronization FST is "1" (ie, when FST is active). Since the frame sync clock is 8 kHz, an encoding interrupt request should be made every 125 μs.
In the receive channel, the L9320 typically receives data from the serial data port from the DR under the control of BCLK and FSR. Similarly, since the receive frame sync clock is 8 kHz, a decode interrupt request should be sent every 125 μs; and ADPCM decode/tone decoding can provide 16 kbps, 24 kbps, or 32 kbps of ADPCM data, and can provide 64 kbps of PCM data. The digital receive gain sensitivity range of the L9320 can be selected and controlled via BR3 (b0:b0) on the SSP port. In order to eliminate the influence of noise, it is also possible to detect the interference noise by setting BR7 (b6) to enable the noise detection algorithm to take noise reduction measures if necessary. The reconstructed linear PCM data is synchronized and sent to BR11 (b7?b0) of the SSP port to perform G. 726 CCITT standard adjustment. The synthesized PCM data will be superimposed with the feedback signal of the transmit channel side gain module and then sent to the Rx attenuation gain control block to protect the output driver and avoid distortion; the Rx attenuation gain can be passed through the BR2 (b2?b0) register of the SSP port. For selection and control, the attenuation range is 0dB ~ -7dB, and the gain step is 1dB.
figure 2
   2.4 Timing and Control
The timing and control portion of the L9320 is primarily used to provide clock signals such as 1.024MHz and 8kHz required for sigma-delta codec filtering. The MCLK master clock of the DSP processing section can be asynchronous to other parts of the clock, which is typically 10.24 MHz or 16.384 MHz in wireless applications. The ∑-Δ codec filter can directly use BCLKR as the 1.024MHz input clock, but its rising edge must be consistent with the rising edge of the FST. If this mode is selected, the ADCLK should be controlled by BCLKT. This can be done by configuring the BR0?b7? register of the SSP port.
In addition, there are two ways to reduce the total power consumption of the chip. The first method is to keep PDI/RESET at 0, which keeps the hardware circuit in a low power state. The second method is implemented by software, that is, when BR0 (b1) is set to the analog low power state, all analog signal processing clocks will stop working; and when BR0 (b0) is set to 1, all digital signal processing The clock will stop working. If the chip is in a low-power state, the outputs of VAG, TG, RO, PO, AXO, DT, and SSP Tx are all high-impedance; when the power mode is reactivated, the ADPCM algorithm is reset to the initial CCITT state. .
3 L9320 application
When the L9320 codec is used in a typical wireless portable product, the VEXT can be powered by a 2.7 to 5.25V battery. The circuit connection method is shown in Figure 3. It should be noted that VDD and VDSP cannot be used to power external systems, and in this mode, the BR0 (b2) register of the SSP port must be cleared first. L9320 can be widely used in low-cost wireless voice communication products. The research team of the author used L9320 to successfully develop the ADPCM voice codec circuit of the wireless conference system. In this system, the L9320 codec is controlled by MCS-51. Completed by a series of microcontrollers. In addition, the L9320 can also be widely used in public switched telephone networks.
image 3
4 Conclusion
The L9320 audio pulse codec has a bidirectional signal path for the ADPCM codec and PCM codec/filter. In addition to the normal ADPCM codec mode, there is also a PCM codec mode, power test mode and codec test. mode. Therefore, different rates of L9320 can be used to achieve different multiplication ratios on each channel, thereby effectively improving channel utilization. The L9320 has two main application areas: one is the wireless telephone system, and the other is the expansion of the line conversation volume in the public switched telephone network. In addition, the L9320 can also be used in portable, low-power wireless communication products such as wireless conferencing systems.
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