Abstract: According to the modulation mechanism of BPSK modulation signal and the principle of square multiplication method, the carrier frequency estimation unit of BPSK modulation signal is designed and implemented on FPGA platform. The ModelSim simulation environment is used to simulate the carrier frequency estimation function, and the effectiveness of the square frequency multiplication method for carrier signal estimation of BPSK signals is verified. The simulation shows that the BPSK signal carrier frequency estimation unit based on FPGA has higher estimation accuracy, and the implementation principle is simple, which has certain practical application value.
0 Preface
BPSK is a binary phase shift keying, which is a modulation method often used in DS signals. It uses the phase change of the carrier to transmit digital information, and the amplitude and frequency of the signal remain constant. BP SK modulation mode has high transmission efficiency, low bit error rate, and is not susceptible to channel characteristics changes. The modulation circuit is simple and easy to implement, the spectral density is low, the processing gain is high, and it has a good low probability of interception. It is widely used. Radar, secure communications and navigation and positioning. It is of great significance to estimate the carrier frequency of the BPSK signal to provide carrier frequency parameters for subsequent tracking and other processing. With the rapid development of signal processing technology and detection technology, many methods for estimating carrier frequency, such as square frequency multiplication method and wavelet correlation method, have emerged.
1 square octave frequency estimation principle
The BPSK modulated signal uses the initial phases 0 and π to represent binary "1" and "0", respectively. The time domain mathematical expression of the BPSK signal can be expressed as:
Sbpsk(t)=A·D(t)cos(2πft+φ)
Where A represents amplitude and D(t) represents binary information, multiplying D(t) by the carrier, since D(t) has only two values, namely “+1†and “-1â€, which represent “0â€. "and "1", so that the BPSK modulated signal has only two phases, then the BPSK modulated signal is generated.
According to the modulation principle of BPSK, the carrier signal is phase-modulated by using binary information, so that the phase of the carrier signal is abrupt, that is, the BPSK signal contains both carrier information and binary information. Therefore, the carrier frequency estimation of the BPSK modulated signal should first eliminate the phase mutation caused by the binary information, leaving only the carrier or carrier-related components, and then performing carrier frequency estimation. Since the binary information of the BPSK modulated signal is a sequence of ±1, the effect of the binary information can be eliminated by the square processing, and the carrier-only component is extracted for carrier frequency estimation.
2 FPGA-based carrier frequency estimation unit design
The carrier frequency estimation unit first performs square processing on the BPSK modulated signal, and then performs a fast Fourier transform (FFT) on the squared signal, frequency-domain sampling point output in the frequency domain, and finally passes the frequency of the FFT transform. The ratio of the resolution to the output sample point completes the estimation of the carrier frequency.
The design of the carrier frequency estimation module is mainly divided into four parts: multiplier, FFT unit, square summation unit, and decision unit.
According to the square multiplication principle, the input signal is first squared. This unit uses the MulTIplier IP core from XilinX, version 4.0. The two input signals of the MulTIplier IP core are 8-bit signed fixed-point numbers, and the output signal is a 16-bit signed fixed-point number. Before the squared signal is Fourier transformed, the signal needs to be preprocessed. The key module of the carrier frequency estimation unit is the Fourier transform module. The Fourier module used is the Fast Fourier Transform IP core from Xilinx, version 7.1. The IP core requires the input data to be in the plural form, because the data calculated by the multiplier is a real number, so the preprocessing of the data is added with an imaginary part of 0, and in order to reduce the calculation amount of the Fourier transform, the calculation is reduced. Time, here the input data is truncated, leaving only the first 8 bits of the data, and then transmitted to the Fast Fourier transform IP core for calculation.
The function of the Fast Fourier Transform IP core is to perform fast Fourier operation on the input complex signal. The number of calculation points is 1024 points, the output calculation result is also complex number, xk_re is the real part of the output signal, and xk_im is the imaginary part of the output signal. To calculate the calculation result, two multipliers MulTIplier IP core and one adder Adder Subtracter IP core are needed, that is, xk_re and xk_im are respectively added after self-multiplication, and the obtained result is input into the decision module. The result of the frequency domain transform by the Fast Fourier Transform IP core has a DC component present and exists at the zero point of the output spectrum, and the decision module must skip the DC component when performing the spectral peak search. Since the calculated number of points is 1024 points and the frequency domain of the output is symmetrical, only 512 points are searched for each search. When the spectral peak is searched, the sampling point corresponding to the output peak is the double frequency sampling point, and the final estimation result is output.
3 simulation
In the ModelSim6.5b environment, the simulation of the frequency estimation unit is performed on different code rates and different carrier frequency conditions.
When the information rate of the BPSK modulated signal is 4000 kHz, the simulation results of the carrier frequency estimation simulation unit have low error and high precision under different carrier frequency conditions. It can be seen that as the carrier frequency is gradually increased, the error is gradually increased. This is because as the carrier frequency increases, the period of the carrier becomes smaller, and the number of sampling points in each period becomes smaller, so the error also follows. The increase, but the simulation results show that the carrier frequency estimation unit can still effectively perform effective carrier estimation on the BPSK modulated signal.
4 Conclusion
According to the modulation mechanism of BPSK signal and the principle of squared frequency multiplication, the design and implementation of BPSK carrier signal generation module and carrier frequency estimation unit are completed on FPGA platform. In ModelSim6.5b environment, carrier is used under different parameters. The frequency estimation unit performs simulation test. The simulation results show that the carrier frequency estimation of BPSK modulation signal with square frequency multiplication method has the characteristics of high precision and low error. At the same time, it is easy to design with the IP core provided by Xilinx on the FPGA platform. Features, so the carrier frequency estimation unit has a high practical significance.
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