Compare the advantages and challenges of three common receiver architectures today -
Heterodyne receiver
Direct sampling receiver
Direct conversion receiver
Our intention is not to praise a certain program but to suppress other programs. Instead, this article aims to illustrate the advantages and disadvantages of these programs, and encourages you to choose the architecture that best suits your particular application in accordance with engineering guidelines.
Heterodyne receiverAdvantages: The heterodyne method has been tested and has excellent performance. The implementation principle is to mix to intermediate frequency (IF). The IF needs to select a sufficiently high frequency that the actual filter can provide good image rejection and LO isolation in the operating band. When an ultra-high dynamic range ADC is available, it is also common to add a mixing stage to reduce the frequency. In addition, the receiver gain is distributed over different frequencies, which makes the risk of high gain receiver oscillations very small. With proper frequency planning, heterodyne receivers can achieve very good spurious energy and noise performance.
Challenge: Unfortunately, this architecture is the most complex. The power consumption and physical size required are usually the largest relative to the available bandwidth. In addition, frequency planning can be very difficult for larger fractional bandwidths. In the current pursuit of small size, low weight, low power (SWaP) and the desire to achieve wide bandwidth, these challenges are very difficult, leading designers to consider other possible architectural options.
Direct samplingAdvantages: It can realize the reception of different frequency bands and bandwidth signals by adjusting its own parameters without making hardware changes. In this way, not only the hardware volume is greatly reduced, but also real-time adjustment can be made according to the difference of the received signals, which has strong flexibility and scalability.
The challenge: The direct sampling method has been pursued by the industry for a long time. The obstacle is that it is difficult for the converter to operate at the rate required for direct RF sampling and to achieve large input bandwidth and large input bandwidth. In this architecture, all receiver gains are in the operating band frequency, and if larger receiver gains are required, the placement and routing must be very careful. Today, in the higher Nyquist bands of the L and S bands, converters are available for direct sampling. As the industry continues to make progress, C-band sampling will soon become practical, and X-band sampling will be addressed later.
Direct conversionAdvantages: The direct conversion architecture is the most efficient to use for data converter bandwidth. The data converter operates in the first Nyquist band, where performance is optimal and low-pass filtering is simpler. The two data converters work together to sample the I/Q signals to increase user bandwidth without interlacing problems.
Challenge: For direct conversion architectures, the main challenge that has been plagued for many years is to maintain I/Q balance to achieve a reasonable level of image rejection, LO leakage, and dc offset. In recent years, advanced integration of the entire direct conversion signal chain coupled with digital calibration has overcome these challenges, and direct conversion architecture has become a very practical approach in many systems.
The figure below shows a block diagram and frequency planning example for the three architectures.
Figure a is an example of a heterodyne receiver with a high-end LO mixing the operating frequency band to the second Nyquist zone of the ADC. The signal is further aliased to the first Nyquist zone for processing.
Figure b is an example of a direct sampling receiver. The working frequency band is sampled and aliased to the first Nyquist zone in the third Nyquist zone, then the NCO is placed in the center of the band, digitally downconverted to baseband, filtered and extracted, and the data rate is reduced to match the channel bandwidth. s level.
Figure c is an example of a direct conversion receiver. The dual ADC is interfaced with a quadrature demodulator, channel 1 pairs (in-phase) I signals are sampled, and channel 2 samples Q (quadrature) signals.
Many modern ADCs support all three architectures simultaneously. For example, the AD9680 is a dual 1.25 GSPS ADC with programmable digital downconversion. This dual-channel ADC supports dual-channel heterodyne architecture and direct-sampling architecture, and a pair of converters can support direct-conversion architectures.
The image rejection challenge of a direct conversion architecture can be quite difficult to overcome when using discrete implementations. By increasing integration and combining digitally assisted processing, the I/Q channels are well matched, dramatically improving image rejection.
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