1. Software reliance
The R&D staff of the original ADAS program tried to overcome the design obstacles. To this end, he (she) created complex software. However, it turns out that pre-programmed algorithms are difficult to work with for complex automotive systems.
Researchers have to create new algorithms for sensor fusion, visual processing, and security. This necessitates the integration of a large code base, which inevitably increases cost and security risks because engineers must continuously maintain and update software.
This means the need to transform from software-centric systems built on commodity hardware to custom system-on-chip (SoCs) and hardware accelerators that focus on computing power, making ADAS developers complex. The algorithm cuts into smaller calculations, which improves the responsiveness of the ADAS design to realistic driving situations.
ADAS's technological evolution provides a template for autonomous automotive engineering teams to implement automated driving with on-chip systems that are as complex as possible and require near-real-TIme performance.
2. Near real-time design
When it comes to ensuring real-time processing, sensor fusion and other mission-critical tasks, the autonomous pilots can learn from the development of ADAS.
In the early days, ADAS developers relied on built-in static random access memory (SRAMs) to exchange information on the on-chip computing subsystem. Paired memory could be used as an output mailbox, and input values ​​for computing tasks would be fed to it. . Communication management in software becomes a technical challenge, and when information processing components increase, it leads to information delay.
Finally, the ADAS chip adopts technologies such as heterogeneous cache coherency. The on-chip communication technology can efficiently communicate with computing elements such as CPU, GPU and DPU in the system on chip, aiming to enhance processing bandwidth and shorten delay.
Most importantly, such hardware accelerators dominate the system for self-driving on-chip systems, and on-chip communication technologies such as heterogeneous cache coherency also play an important role, allowing on-chip systems to perform near real-time embedded processing. For complex machine learning algorithms.
3. The challenge of integration
The complexity of the autopilot system-on-chip is chilling, thanks to the integration of the powerful features, functional security requirements, and near-real-TIme embedded performance converge of a supercomputer into a custom silicon chip. A feeling becomes even more obvious.
Many autonomous driving designs use hardware accelerators for research and development. These devices are used as processing nodes for specific algorithmic tasks, such as computer vision for high-definition radar imaging. While the on-chip system of many autonomous vehicles is performing machine learning functions using a deep neuron network, the hardware accelerator functions as a neuron within the network.
In this type of system-on-a-chip infrastructure, hardware accelerators or heterogeneous processing components can be precisely tuned for specific autopilot algorithms, and on-chip interconnects can connect all hardware accelerators in a consistent manner, ensuring that the ever-increasing system complexity is controlled.
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